Courses: 1.- WIRELESS SENSOR NETWORKS, 2.- INDUSTRIAL COMMUNICATIONS, 3.- ARCHITECTURES FOR CONTROL, 4.- LATEST TRENDS IN EMBEDDED SYSTEMS, 5.- CONTROL SYSTEMS IN AEROSPATIAL MISSIONS.

Goals: The module provides a complete overview of the structure, operation and programming of various types of electronic control systems currently available. It is also been addressed the current state of communications technology applied to industrial process control. Moreover, advances in wireless networks and the integration of microsensors in embedded low power microcontrollers are promoting a new generation of massive networks of sensors with a wide variety of commercial applications.

Teaching staff (alphabetical order): Miguel Damas Hermoso (UGR), Peter Glösekötter (U. Münster), Francisco Gómez Mula (UGR), Gonzalo Olivares Ruiz (UGR), Julio F. Rodríguez Gómez (IAA-CSIC).

Courses: 1.- DISTRIBUTED SERVERS, 2.- SECURE SERVERS, 3.- HIGH-PERFORMANCE COMMUNICATION ARCHITECTURES, 4.- INTEROPERABILITY IN HETEROGENEOUS COMPUTER NETWORKS, 5.- SERVERS, VIRTUALIZATION AND COHERENCE PROTOCOLS.

Goals: This module examines the security, reliability and high availability of servers, with special emphasis on clusters of computers. Considering access to shared resources and interoperability between different systems, protocols and low and high-level standards to achieve inter-process communication and distributed objects, and discusses techniques for developing and implementing some modern tools of distributed information systems including the design of Web applications using J2EE technology. It also discusses new trends in communication architectures, new system interconnections and virtual machines, and the capabilities of network processors in the development of system software and network applications.

Teaching staff (alphabetical order): José Luis Bernier Villamor (UGR), Antonio Díaz García (UGR), José Manuel García Carrasco (U. Murcia), Julio Ortega Lopera (UGR), Pedro Castillo Valdivieso (UGR)

Courses: 1.- CODE OPTIMIZATION FOR HIGH PERFORMANCE SOFTWARE, 2.- MULTIPROCESSOR AND MULTICOMPUTER PROGRAMMING TOOLS, 3.- HIGH PERFORMANCE COMPUTATION IN BIOINFORMATICS, 4.- HIGH PERFORMANCE COMPUTATION IN OPTIMIZATION AND FORECAST, 5.- REAL TIME COMPUTATION OF MEDICAL IMAGES, 6.- HIGH PERFOMANCE COMPUTING FOR MICROARRAYS AND BIOCHIPS.

Goals: This module considers the use of current computer architectures, including high-performance parallel computers and programming tools to optimize code performance. We analyze the applications that demand high performance related to the segment of the computer market to which they are addressed, applications such as optimization, prediction and bioinformatics.

Teaching staff (alphabetical order): Mancia Anguita López (UGR), Francisco Javier Fernández Baldomero (UGR), Héctor Pomares Cintas (UGR), Francisco José Quiles Flor (U. Castilla-La Mancha), Ignacio Rojas Ruíz (UGR), Fernando Rojas Ruiz (UGR).

Courses: 1.- ARCHITECTURE OF PROCESSORS AND CONFIGURABLE CIRCUITS, 2.- RECONFIGURABLE HARDWARE (CO)DESIGN TOOLS, 3.- NEUROMORPHIC ENGINEERING, 4.- BUILT-IN OPERATING SYSTEMS, 5.- PERFORMANCE ASSESSMENT IN CONFIGURABLE PROCESSORS AND CIRCUITS.

Goals: This module addresses the learning of design methodologies for computing architectures, including current configurable processing systems and hardware/software (co-design) methodologies. It is also considered the use of performance assessment strategies and computational costs, and the different techniques and development tools for real-time operating systems in embedded systems to meet the low cost and short development time requirements.

Teaching staff (alphabetical order): Domingo Benítez Díaz (U Las Palmas de Gran Canaria), Jesús González Peñalver (UGR), Francisco Pelayo Valle (UGR), Begoña del Pino Prieto (UGR), Eduardo Ros Vidal (UGR).

Courses: 1.- ENGINEERING OF SIGNAL PROCESSING AND APPLICATIONS IN BIOMEDICINE, 2.- ADVANCED PERIPHERALS AND PERSON-COMPUTER INTERFACES, 3.- ARCHITECTURES FOR IMPLEMENTATION OF VISION APPLICATIONS, 4.- SELF-ORGANIZING SYSTEMS ENGINEERING, 5.- EVOLUTIVE COMPUTATION: IMPLEMENTATION AND APPLICATIONS, 6.- INTEGRATED ARCHITECTURES OF BIOINSPIRED SYSTEMS.

Goals: This module examines specific applications, both from the point of view of the procedures used to address them, as the requirements for effective implementation and desirable characteristics in the architectures in which they reside.

Teaching staff (alphabetical order): Massimo Barbaro (U. Cagliari), Carlos García Puntonet (UGR), Pedro Martín Smith (UGR), Juan Julián Merelo Guervós (UGR), Alberto Prieto Espinosa (UGR), Manuel Rodríguez Álvarez (UGR).

• Mapping between courses and professors

- To get the Master's Degree in Computer & Network Engineering and Networks is compulsory to present a Master’s thesis (TFM).

1. The Master’s professor who has been appointed as tutor of a student must notify to the Master’s Academic Committee the title of the Master’s Thesis assigned to the student as well as the name of the professor of the Department of Computer Architecture and Computer Technology supervising the thesis, not later than 15 days before the defense.
2. The research work must belong to one of the following research lines.
3. The evaluation of the projects will be carried out by a specific board, which will be proposed by the Master’s Academic Committee and approved by the Board of Department of Computer Architecture and Computer Technology.
4. Each Board shall consist of six experts, three of whom are in the reserve. Among the board members there must be two Master’s professors and one external professor.
5. The project must be delivered to the Secretary of the Department or the Coordinator of the Master with at least one week prior to the defense.
6. The evaluation of the Master’s theses will take place during the month of July, September and/or December. The exact date will be announced with a minimum of three weeks in advance.